The invention relates to the design and manufacture of integrated circuits. An integrated circuit (IC) has a large number of electronic components, such as transistors, logic gates, diodes, and wires, which are fabricated by forming layers of different materials and of different geometric shapes on various regions of a silicon wafer.
Many phases of an electronic design may be implemented with computer aided design (CAD) tools or electronic design automation (EDA) systems. To design an integrated circuit, a designer first creates high level behavior descriptions of the IC device using a high-level hardware design language. An EDA system typically receives the high level behavior descriptions of the IC device and translates this high-level design language into netlists of various levels of abstraction using a computer synthesis process. A netlist describes interconnections of nodes and components on the chip and includes information of circuit primitives such as transistors and diodes, their sizes and interconnections, for example. The netlist may then be implemented as a physical design based upon the processes of layout, placement, and routing. The circuit design may be verified, analyzed, and/or optimized at numerous stages within the design process.
As more and more functionalities are integrated into an IC chip, controlling the power consumption of the chip has become a major design challenge. Increasingly, designs incorporate power management circuitry that uses power switches to turn off blocks of the designs when they are not needed.
One approach to implementing power switch configurations is to use simple manual calculations to determine the number of needed power switches during floorplanning. The problem with this approach is that such calculations are very simplistic and may be severely inaccurate. As a result, designers that use this approach may need to be overly conservative with power switch configuration, resulting in more power switches than are actually required for the design. The extra power switches contribute to the leakage power consumption for the blocks that they are used to turn off. This constitutes a large proportion of the power consumption when the blocks are turned off, e.g. when the chip is in stand-by mode.
Therefore, there is a need for an improved approach to performing power switch analysis and optimization.